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Shuttling silicon spin qubits achieve weight-four parity checks

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Shuttling silicon spin qubits achieve weight-four parity checks

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An international team of physicists demonstrated a silicon spin-qubit device that uses a shuttling bus to perform weight-four parity checks, a key requirement for quantum error correction. The device achieved universal control of a five-qubit processor and generated a five-qubit Greenberger–Horne–Zeilinger state, the largest such state constructed with gate-defined semiconductor spins. The achievement lays the groundwork for modular quantum computing and near-term error-correction experiments.

Shuttling Bus Architecture

The device features a shuttling bus that transports qubits between four isolated bus stops, enabling long-range connectivity while reducing crosstalk. The team dynamically populated the array and tuned all single- and two-qubit operations using shuttling and quantum non-demolition spin measurements. They demonstrated universal control of an effective five-qubit processor without access to charge sensing in most of the device.

Multi-Qubit Entanglement

Using weight-four parity checks, the researchers generated multi-qubit entanglement across all combinations of qubits in the array. They verified the genuine entanglement of a five-qubit Greenberger–Horne–Zeilinger state, marking one of the largest such states with gate-defined semiconductor spins. The result establishes a practical pathway for modular quantum error correction using mobile qubits.

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